The following papers, presentations and public documents from the T-CREST project partners are available for download.

Papers and Presentations

The following publications and presentations are available to provide additional information concerning the research and development work being carried out in the T-CREST project.

Paper: "Refinement of Worst-Case Execution Time Bounds by Graph Pruning". Authors: Florian Brandnerm, Alexander Jordan

• Computer Languages, Systems & Structures (COMLAN), 2014

Paper: "Towards Automated Generation of Time-Predictable Code". Authors: Daniel Prokesch, Benedikt Huber, Peter Puschner

• International Workshop on Worst-Case Execution Time Analysis, volume 39 of OASIcs

Paper: "The T-CREST Approach of Compiler and WCET-Analysis Integration". Authors: P. Puschner, D. Prokesch, B. Huber, J. Knoop, S Hepp, G. Gebhard

• Proceedings of the 9th Workshop on Software Technologies for Future Embedded and Ubiquitous Systems
  

Paper: "Criticality: static profiling for real-time programs". Authors: Florian Brandner, Stefan Hepp, Alexander Jordan

• Real-Time Systems (RTS), May 2014, Volume 50, Issue 3

Paper: "Subgraph-Based Refinement of Worst-Case Execution Time Bounds". Authors: Florian Brandner, Alexander Jordan

• Technical Report of École Nationale Supérieure de Techniques Avancées (ENSTA)

Paper: "Scope-based Method Cache Analysis". Authors: Benedikt Huber, Stefan Hepp, Martin Schoeberl

• 14th International Workshop on Worst-Case Execution Time Analysis

Paper: "Lazy Spilling for a Time-Predictable Stack Cache: Implementation and Analysis". Authors: Sahar Abbaspour, Alexander Jordan, and Florian Brandner

• 14th International Workshop on Worst-Case Execution Time Analysis

Paper: "Router Designs for an Asynchronous Time-Division-Multiplexed Network-on-Chip". Authors: Evangelia Kasapaki, Jens Sparsø, Rasmus Bo Sørensen, Kees Goosens

• Proceedings of the 2013 Euromicro Conference on Digital Systems Design (DSD)

Presentation: "Static Analysis of Worst-Case Stack Cache Behavior". Author: Florian Brandner

• 7th Meeting of the French Compilation Community, December 2013, Dammarie Les Lys, France

Paper: "Static Analysis of Worst-Case Stack Cache Behavior". Authors: Alexander Jordan, Florian Brandner, Martin Schoeberl

• Proceedings of the 21st International conference on Real-Time Networks and Systems (RTNS 2013)

Paper: "A Reconfigurable Real-Time SDRAM Controller for Mixed Time-Criticality Systems". Sven Goossens, Jasper Kuijsten, Benny Akesson, Kees Goossens

• Int'l Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS 2013)

Paper: "Combined WCET analysis of bitcode and machine code using control-flow relation graphs". Authors: Benedikt Huber, Daniel Prokesch, Peter Puschner

• Proceedings of the 14th ACM SIGPLAN/SIGBED conference on Languages, Compilers and Tools for Embedded Systems (LCTES 2013)

Paper: "Architecture and Optimal Configuration of a Real-Time Multi-Channel Memory Controller". Authors: Manil Dev Gomony, Benny Akesson, Kees Goossens

• Proc. Design, Automation and Test in Europe Conference and Exhibition (DATE 2013)

Paper: "An Area-efficient Network Interface for a TDM-based Network-on-Chip". Authors: Jens Sparsø, Evangelia Kasapaki, Martin Schoeberl

• Processor Design, Automation and Test in Europe (DATE), pages 1044-1047, 2013 

Paper: "A Time-predictable Stack Cache". Authors: Sahar Abbaspour, Florian Brandner, Martin Schoeberl

• Proceedings of the 9th Workshop on Software Technologies for Embedded and Ubiquitous Systems, 2013

Paper: "A light-weight statically scheduled network-on-chip". Authors: Rasmus Bo Sorensen, Martin Schoeberl, Jens Sparso

• Proceedings of the 29th Norchip Conference, Copenhagen, Novemeber 2012. IEEE

Paper: "Static Profiling of the Worst-Case in Real-Time Programs". Authors: Florian Brandner, Stefan Hepp, Alexander Jordan

• Voted Best Paper at 20th International Conference on Real-Time and Network Systems, Pont à Mousson, France, November 2012, Proceedings pages 61-70, ACM ICPS

Paper: "Static Routing in Symmetric Real-Time Network-on-Chips". Authors: Florian Brandner, Martin Schoeberl

• 20th International Conference on Real-Time and Network Systems, Pont à Mousson, France, November 2012, Proceedings pages 61-70, ACM ICPS

Paper: "A Formal Framework for Precise Parametric WCET Formulas". Authors: Benedikt Huber, Daniel Prokesch, Peter Puschner

• 12th International Workshop on Worst-Case Execution Time Analysis, volume 23 of OpenAccess Series in Informatics (OASIcs), pages 91–102, Dagstuhl, Germany, 2012

Paper: "Compiling for Time Predictability". Authors: Peter Puschner, Raimund Kirner, Benedikt Huber, Daniel Prokesch

• SAFECOMP Workshops, volume 7613 of Lecture Notes in Computer Science, pages 382–391. Springer, 2012

Paper: "Is Time Predictability Quantifiable?". Author: Martin Schoeberl

• International Conference on Embedded Computer Systems (SAMOS 2012), IEEE, Samos, Greece, September 2012

Keynote Presentation: "Design of Networks-on-Chip for Real-Time Multi-Processor Systems-on-Chip". Author: Jens Sparsø

• 33rd International Conference on Application and Theory of Petri Nets and Concurrency and 12th International Conference on Application of Concurrency to System Design, Hamburg, Germany, June 2012

Paper: "A Statically Scheduled Time-Division-Multiplexed Network-on-Chip for Real-Time Systems". Authors: Martin Schoeberl, Florian Brandner, Jens Sparsø, Evangelia Kasapaki

• 6th International Symposium on Networks-on-Chip (NOCS), IEEE, Copenhagen, May 2012

Paper: "Worst-case execution time based optimization of real-time Java programs". Authors: Stefan Hepp, Martin Schoeberl

• 15th IEEE International Symposium on Object/component/service-oriented Real-time distributed Computing (ISORC 2012), IEEE, Shenzhen, China, April 2012.

T-CREST Project poster

• 7th Annual Conference on High-Performance and Embedded Architectures and Compilers (HiPEAC), Paris, January 2012

Press Release

• Europe invests €3M for Research and Development of Time-Predictable Multicore Architecture for Safety-Critical Systems